Here is the problem I am working on
The Problem: A high speed workstation has 64 bit words and 64 bit addresses with address resolution at the byte level. How many words can in be in the address space of the workstation?
I defined the different terms in the problem
- Word Size - Processor natural unit of data. The word size determines the amount of information that can be processed in one go
- Byte Level Addressing - Hardware architectures that support accessing individual bytes within a word
- 64 Bit Addressing - You have have 64 bits to specify an address in Runtime memory that holds an instruction or data
- Address Space - Running program's view of memory in the system
How would you go about using all these definitions to solve this problem?
From 64 bits, I know that technically there are 2^64 locations in memory and from 64 bit words, that a processor processes 8 bytes a time. But I don't know how to use that information to conclude how many words are in the address space of the computer.